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Commit 1b0404c4 authored by Keith Randall's avatar Keith Randall
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[dev.ssa] cmd/compile: fix verbose typing of DIV 

Use Cherry's awesome pair type constructor.

Change-Id: I282156a570ee4dd3548bd82fbf15b8d8eb5bedf6
Reviewed-on: https://go-review.googlesource.com/25009Reviewed-by: 's avatarJosh Bleecher Snyder <josharian@gmail.com>
parent aee8d8b9
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Showing with 38 additions and 38 deletions
src/cmd/compile/internal/ssa/gen/AMD64.rules
View file @ 1b0404c4
......@@ -29,14 +29,14 @@
(Div32F x y) -> (DIVSS x y)
(Div64F x y) -> (DIVSD x y)
(Div64 x y) -> (Select0 (DIVQ x y <&TupleType{config.Frontend().TypeInt64(), config.Frontend().TypeInt64()}>))
(Div64u x y) -> (Select0 (DIVQU x y <&TupleType{config.Frontend().TypeUInt64(), config.Frontend().TypeUInt64()}>))
(Div32 x y) -> (Select0 (DIVL x y <&TupleType{config.Frontend().TypeInt32(), config.Frontend().TypeInt32()}>))
(Div32u x y) -> (Select0 (DIVLU x y <&TupleType{config.Frontend().TypeUInt32(), config.Frontend().TypeUInt32()}>))
(Div16 x y) -> (Select0 (DIVW x y <&TupleType{config.Frontend().TypeInt16(), config.Frontend().TypeInt16()}>))
(Div16u x y) -> (Select0 (DIVWU x y <&TupleType{config.Frontend().TypeUInt16(), config.Frontend().TypeUInt16()}>))
(Div8 x y) -> (Select0 (DIVW (SignExt8to16 x) (SignExt8to16 y) <&TupleType{config.Frontend().TypeInt8(), config.Frontend().TypeInt8()}>))
(Div8u x y) -> (Select0 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y) <&TupleType{config.Frontend().TypeUInt8(), config.Frontend().TypeUInt8()}>))
(Div64 x y) -> (Select0 (DIVQ x y))
(Div64u x y) -> (Select0 (DIVQU x y))
(Div32 x y) -> (Select0 (DIVL x y))
(Div32u x y) -> (Select0 (DIVLU x y))
(Div16 x y) -> (Select0 (DIVW x y))
(Div16u x y) -> (Select0 (DIVWU x y))
(Div8 x y) -> (Select0 (DIVW (SignExt8to16 x) (SignExt8to16 y)))
(Div8u x y) -> (Select0 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)))
(Hmul64 x y) -> (HMULQ x y)
(Hmul64u x y) -> (HMULQU x y)
......@@ -49,14 +49,14 @@
(Avg64u x y) -> (AVGQU x y)
(Mod64 x y) -> (Select1 (DIVQ x y <&TupleType{config.Frontend().TypeInt64(), config.Frontend().TypeInt64()}>))
(Mod64u x y) -> (Select1 (DIVQU x y <&TupleType{config.Frontend().TypeUInt64(), config.Frontend().TypeUInt64()}>))
(Mod32 x y) -> (Select1 (DIVL x y <&TupleType{config.Frontend().TypeInt32(), config.Frontend().TypeInt32()}>))
(Mod32u x y) -> (Select1 (DIVLU x y <&TupleType{config.Frontend().TypeUInt32(), config.Frontend().TypeUInt32()}>))
(Mod16 x y) -> (Select1 (DIVW x y <&TupleType{config.Frontend().TypeInt16(), config.Frontend().TypeInt16()}>))
(Mod16u x y) -> (Select1 (DIVWU x y <&TupleType{config.Frontend().TypeUInt16(), config.Frontend().TypeUInt16()}>))
(Mod8 x y) -> (Select1 (DIVW (SignExt8to16 x) (SignExt8to16 y) <&TupleType{config.Frontend().TypeInt8(), config.Frontend().TypeInt8()}>))
(Mod8u x y) -> (Select1 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y) <&TupleType{config.Frontend().TypeUInt8(), config.Frontend().TypeUInt8()}>))
(Mod64 x y) -> (Select1 (DIVQ x y))
(Mod64u x y) -> (Select1 (DIVQU x y))
(Mod32 x y) -> (Select1 (DIVL x y))
(Mod32u x y) -> (Select1 (DIVLU x y))
(Mod16 x y) -> (Select1 (DIVW x y))
(Mod16u x y) -> (Select1 (DIVWU x y))
(Mod8 x y) -> (Select1 (DIVW (SignExt8to16 x) (SignExt8to16 y)))
(Mod8u x y) -> (Select1 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)))
(And64 x y) -> (ANDQ x y)
(And32 x y) -> (ANDL x y)
......
src/cmd/compile/internal/ssa/gen/AMD64Ops.go
View file @ 1b0404c4
......@@ -212,12 +212,12 @@ func init() {
{name: "AVGQU", argLength: 2, reg: gp21, commutative: true, resultInArg0: true}, // (arg0 + arg1) / 2 as unsigned, all 64 result bits
{name: "DIVQ", argLength: 2, reg: gp11div, asm: "IDIVQ"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVL", argLength: 2, reg: gp11div, asm: "IDIVL"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVW", argLength: 2, reg: gp11div, asm: "IDIVW"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVQU", argLength: 2, reg: gp11div, asm: "DIVQ"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVLU", argLength: 2, reg: gp11div, asm: "DIVL"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVWU", argLength: 2, reg: gp11div, asm: "DIVW"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVQ", argLength: 2, reg: gp11div, typ: "(Int64,Int64)", asm: "IDIVQ"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVL", argLength: 2, reg: gp11div, typ: "(Int32,Int32)", asm: "IDIVL"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVW", argLength: 2, reg: gp11div, typ: "(Int16,Int16)", asm: "IDIVW"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVQU", argLength: 2, reg: gp11div, typ: "(UInt64,UInt64)", asm: "DIVQ"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVLU", argLength: 2, reg: gp11div, typ: "(UInt32,UInt32)", asm: "DIVL"}, // [arg0 / arg1, arg0 % arg1]
{name: "DIVWU", argLength: 2, reg: gp11div, typ: "(UInt16,UInt16)", asm: "DIVW"}, // [arg0 / arg1, arg0 % arg1]
{name: "ANDQ", argLength: 2, reg: gp21, asm: "ANDQ", commutative: true, resultInArg0: true}, // arg0 & arg1
{name: "ANDL", argLength: 2, reg: gp21, asm: "ANDL", commutative: true, resultInArg0: true}, // arg0 & arg1
......
src/cmd/compile/internal/ssa/rewriteAMD64.go
View file @ 1b0404c4
......@@ -3275,12 +3275,12 @@ func rewriteValueAMD64_OpDiv16(v *Value, config *Config) bool {
_ = b
// match: (Div16 x y)
// cond:
// result: (Select0 (DIVW x y <&TupleType{config.Frontend().TypeInt16(), config.Frontend().TypeInt16()}>))
// result: (Select0 (DIVW x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVW, &TupleType{config.Frontend().TypeInt16(), config.Frontend().TypeInt16()})
v0 := b.NewValue0(v.Line, OpAMD64DIVW, MakeTuple(config.fe.TypeInt16(), config.fe.TypeInt16()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3292,12 +3292,12 @@ func rewriteValueAMD64_OpDiv16u(v *Value, config *Config) bool {
_ = b
// match: (Div16u x y)
// cond:
// result: (Select0 (DIVWU x y <&TupleType{config.Frontend().TypeUInt16(), config.Frontend().TypeUInt16()}>))
// result: (Select0 (DIVWU x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVWU, &TupleType{config.Frontend().TypeUInt16(), config.Frontend().TypeUInt16()})
v0 := b.NewValue0(v.Line, OpAMD64DIVWU, MakeTuple(config.fe.TypeUInt16(), config.fe.TypeUInt16()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3309,12 +3309,12 @@ func rewriteValueAMD64_OpDiv32(v *Value, config *Config) bool {
_ = b
// match: (Div32 x y)
// cond:
// result: (Select0 (DIVL x y <&TupleType{config.Frontend().TypeInt32(), config.Frontend().TypeInt32()}>))
// result: (Select0 (DIVL x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVL, &TupleType{config.Frontend().TypeInt32(), config.Frontend().TypeInt32()})
v0 := b.NewValue0(v.Line, OpAMD64DIVL, MakeTuple(config.fe.TypeInt32(), config.fe.TypeInt32()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3341,12 +3341,12 @@ func rewriteValueAMD64_OpDiv32u(v *Value, config *Config) bool {
_ = b
// match: (Div32u x y)
// cond:
// result: (Select0 (DIVLU x y <&TupleType{config.Frontend().TypeUInt32(), config.Frontend().TypeUInt32()}>))
// result: (Select0 (DIVLU x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVLU, &TupleType{config.Frontend().TypeUInt32(), config.Frontend().TypeUInt32()})
v0 := b.NewValue0(v.Line, OpAMD64DIVLU, MakeTuple(config.fe.TypeUInt32(), config.fe.TypeUInt32()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3358,12 +3358,12 @@ func rewriteValueAMD64_OpDiv64(v *Value, config *Config) bool {
_ = b
// match: (Div64 x y)
// cond:
// result: (Select0 (DIVQ x y <&TupleType{config.Frontend().TypeInt64(), config.Frontend().TypeInt64()}>))
// result: (Select0 (DIVQ x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVQ, &TupleType{config.Frontend().TypeInt64(), config.Frontend().TypeInt64()})
v0 := b.NewValue0(v.Line, OpAMD64DIVQ, MakeTuple(config.fe.TypeInt64(), config.fe.TypeInt64()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3390,12 +3390,12 @@ func rewriteValueAMD64_OpDiv64u(v *Value, config *Config) bool {
_ = b
// match: (Div64u x y)
// cond:
// result: (Select0 (DIVQU x y <&TupleType{config.Frontend().TypeUInt64(), config.Frontend().TypeUInt64()}>))
// result: (Select0 (DIVQU x y))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVQU, &TupleType{config.Frontend().TypeUInt64(), config.Frontend().TypeUInt64()})
v0 := b.NewValue0(v.Line, OpAMD64DIVQU, MakeTuple(config.fe.TypeUInt64(), config.fe.TypeUInt64()))
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
......@@ -3407,12 +3407,12 @@ func rewriteValueAMD64_OpDiv8(v *Value, config *Config) bool {
_ = b
// match: (Div8 x y)
// cond:
// result: (Select0 (DIVW (SignExt8to16 x) (SignExt8to16 y) <&TupleType{config.Frontend().TypeInt8(), config.Frontend().TypeInt8()}>))
// result: (Select0 (DIVW (SignExt8to16 x) (SignExt8to16 y)))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVW, &TupleType{config.Frontend().TypeInt8(), config.Frontend().TypeInt8()})
v0 := b.NewValue0(v.Line, OpAMD64DIVW, MakeTuple(config.fe.TypeInt16(), config.fe.TypeInt16()))
v1 := b.NewValue0(v.Line, OpSignExt8to16, config.fe.TypeInt16())
v1.AddArg(x)
v0.AddArg(v1)
......@@ -3428,12 +3428,12 @@ func rewriteValueAMD64_OpDiv8u(v *Value, config *Config) bool {
_ = b
// match: (Div8u x y)
// cond:
// result: (Select0 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y) <&TupleType{config.Frontend().TypeUInt8(), config.Frontend().TypeUInt8()}>))
// result: (Select0 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)))
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Line, OpAMD64DIVWU, &TupleType{config.Frontend().TypeUInt8(), config.Frontend().TypeUInt8()})
v0 := b.NewValue0(v.Line, OpAMD64DIVWU, MakeTuple(config.fe.TypeUInt16(), config.fe.TypeUInt16()))
v1 := b.NewValue0(v.Line, OpZeroExt8to16, config.fe.TypeUInt16())
v1.AddArg(x)
v0.AddArg(v1)
......
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