cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64

ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).

R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.

The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.

Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.

All implementations have floating point instructions.

This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.

	STLXRW	R1, (R0), R3

This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.

No other changes are made to the portable Prog and Addr structures.

Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046Reviewed-by: Russ Cox <rsc@golang.org>

src/cmd/internal/obj/arm64/anames.go

+// Generated by stringer -i 7.out.go -o anames.go -p arm64
+// Do not edit.
+
+package arm64
+
+import "cmd/internal/obj"
+
+var Anames = []string{
+	obj.A_ARCHSPECIFIC: "ADC",
+	"ADCS",
+	"ADCSW",
+	"ADCW",
+	"ADD",
+	"ADDS",
+	"ADDSW",
+	"ADDW",
+	"ADR",
+	"ADRP",
+	"AND",
+	"ANDS",
+	"ANDSW",
+	"ANDW",
+	"ASR",
+	"ASRW",
+	"AT",
+	"BFI",
+	"BFIW",
+	"BFM",
+	"BFMW",
+	"BFXIL",
+	"BFXILW",
+	"BIC",
+	"BICS",
+	"BICSW",
+	"BICW",
+	"BRK",
+	"CBNZ",
+	"CBNZW",
+	"CBZ",
+	"CBZW",
+	"CCMN",
+	"CCMNW",
+	"CCMP",
+	"CCMPW",
+	"CINC",
+	"CINCW",
+	"CINV",
+	"CINVW",
+	"CLREX",
+	"CLS",
+	"CLSW",
+	"CLZ",
+	"CLZW",
+	"CMN",
+	"CMNW",
+	"CMP",
+	"CMPW",
+	"CNEG",
+	"CNEGW",
+	"CRC32B",
+	"CRC32CB",
+	"CRC32CH",
+	"CRC32CW",
+	"CRC32CX",
+	"CRC32H",
+	"CRC32W",
+	"CRC32X",
+	"CSEL",
+	"CSELW",
+	"CSET",
+	"CSETM",
+	"CSETMW",
+	"CSETW",
+	"CSINC",
+	"CSINCW",
+	"CSINV",
+	"CSINVW",
+	"CSNEG",
+	"CSNEGW",
+	"DC",
+	"DCPS1",
+	"DCPS2",
+	"DCPS3",
+	"DMB",
+	"DRPS",
+	"DSB",
+	"EON",
+	"EONW",
+	"EOR",
+	"EORW",
+	"ERET",
+	"EXTR",
+	"EXTRW",
+	"HINT",
+	"HLT",
+	"HVC",
+	"IC",
+	"ISB",
+	"LDAR",
+	"LDARB",
+	"LDARH",
+	"LDARW",
+	"LDAXP",
+	"LDAXPW",
+	"LDAXR",
+	"LDAXRB",
+	"LDAXRH",
+	"LDAXRW",
+	"LDP",
+	"LDXR",
+	"LDXRB",
+	"LDXRH",
+	"LDXRW",
+	"LDXP",
+	"LDXPW",
+	"LSL",
+	"LSLW",
+	"LSR",
+	"LSRW",
+	"MADD",
+	"MADDW",
+	"MNEG",
+	"MNEGW",
+	"MOVK",
+	"MOVKW",
+	"MOVN",
+	"MOVNW",
+	"MOVZ",
+	"MOVZW",
+	"MRS",
+	"MSR",
+	"MSUB",
+	"MSUBW",
+	"MUL",
+	"MULW",
+	"MVN",
+	"MVNW",
+	"NEG",
+	"NEGS",
+	"NEGSW",
+	"NEGW",
+	"NGC",
+	"NGCS",
+	"NGCSW",
+	"NGCW",
+	"ORN",
+	"ORNW",
+	"ORR",
+	"ORRW",
+	"PRFM",
+	"PRFUM",
+	"RBIT",
+	"RBITW",
+	"REM",
+	"REMW",
+	"REV",
+	"REV16",
+	"REV16W",
+	"REV32",
+	"REVW",
+	"ROR",
+	"RORW",
+	"SBC",
+	"SBCS",
+	"SBCSW",
+	"SBCW",
+	"SBFIZ",
+	"SBFIZW",
+	"SBFM",
+	"SBFMW",
+	"SBFX",
+	"SBFXW",
+	"SDIV",
+	"SDIVW",
+	"SEV",
+	"SEVL",
+	"SMADDL",
+	"SMC",
+	"SMNEGL",
+	"SMSUBL",
+	"SMULH",
+	"SMULL",
+	"STXR",
+	"STXRB",
+	"STXRH",
+	"STXP",
+	"STXPW",
+	"STXRW",
+	"STLP",
+	"STLPW",
+	"STLR",
+	"STLRB",
+	"STLRH",
+	"STLRW",
+	"STLXP",
+	"STLXPW",
+	"STLXR",
+	"STLXRB",
+	"STLXRH",
+	"STLXRW",
+	"STP",
+	"SUB",
+	"SUBS",
+	"SUBSW",
+	"SUBW",
+	"SVC",
+	"SXTB",
+	"SXTBW",
+	"SXTH",
+	"SXTHW",
+	"SXTW",
+	"SYS",
+	"SYSL",
+	"TBNZ",
+	"TBZ",
+	"TLBI",
+	"TST",
+	"TSTW",
+	"UBFIZ",
+	"UBFIZW",
+	"UBFM",
+	"UBFMW",
+	"UBFX",
+	"UBFXW",
+	"UDIV",
+	"UDIVW",
+	"UMADDL",
+	"UMNEGL",
+	"UMSUBL",
+	"UMULH",
+	"UMULL",
+	"UREM",
+	"UREMW",
+	"UXTB",
+	"UXTH",
+	"UXTW",
+	"UXTBW",
+	"UXTHW",
+	"WFE",
+	"WFI",
+	"YIELD",
+	"MOVB",
+	"MOVBU",
+	"MOVH",
+	"MOVHU",
+	"MOVW",
+	"MOVWU",
+	"MOVD",
+	"MOVNP",
+	"MOVNPW",
+	"MOVP",
+	"MOVPD",
+	"MOVPQ",
+	"MOVPS",
+	"MOVPSW",
+	"MOVPW",
+	"BEQ",
+	"BNE",
+	"BCS",
+	"BHS",
+	"BCC",
+	"BLO",
+	"BMI",
+	"BPL",
+	"BVS",
+	"BVC",
+	"BHI",
+	"BLS",
+	"BGE",
+	"BLT",
+	"BGT",
+	"BLE",
+	"FABSD",
+	"FABSS",
+	"FADDD",
+	"FADDS",
+	"FCCMPD",
+	"FCCMPED",
+	"FCCMPS",
+	"FCCMPES",
+	"FCMPD",
+	"FCMPED",
+	"FCMPES",
+	"FCMPS",
+	"FCVTSD",
+	"FCVTDS",
+	"FCVTZSD",
+	"FCVTZSDW",
+	"FCVTZSS",
+	"FCVTZSSW",
+	"FCVTZUD",
+	"FCVTZUDW",
+	"FCVTZUS",
+	"FCVTZUSW",
+	"FDIVD",
+	"FDIVS",
+	"FMOVD",
+	"FMOVS",
+	"FMULD",
+	"FMULS",
+	"FNEGD",
+	"FNEGS",
+	"FSQRTD",
+	"FSQRTS",
+	"FSUBD",
+	"FSUBS",
+	"SCVTFD",
+	"SCVTFS",
+	"SCVTFWD",
+	"SCVTFWS",
+	"UCVTFD",
+	"UCVTFS",
+	"UCVTFWD",
+	"UCVTFWS",
+	"HISTORY",
+	"NAME",
+	"WORD",
+	"DYNT",
+	"INIT",
+	"BCASE",
+	"CASE",
+	"DWORD",
+	"SIGNAME",
+	"GOK",
+	"END",
+	"FCSELS",
+	"FCSELD",
+	"FMAXS",
+	"FMINS",
+	"FMAXD",
+	"FMIND",
+	"FMAXNMS",
+	"FMAXNMD",
+	"FNMULS",
+	"FNMULD",
+	"FRINTNS",
+	"FRINTND",
+	"FRINTPS",
+	"FRINTPD",
+	"FRINTMS",
+	"FRINTMD",
+	"FRINTZS",
+	"FRINTZD",
+	"FRINTAS",
+	"FRINTAD",
+	"FRINTXS",
+	"FRINTXD",
+	"FRINTIS",
+	"FRINTID",
+	"FMADDS",
+	"FMADDD",
+	"FMSUBS",
+	"FMSUBD",
+	"FNMADDS",
+	"FNMADDD",
+	"FNMSUBS",
+	"FNMSUBD",
+	"FMINNMS",
+	"FMINNMD",
+	"FCVTDH",
+	"FCVTHS",
+	"FCVTHD",
+	"FCVTSH",
+	"AESD",
+	"AESE",
+	"AESIMC",
+	"AESMC",
+	"SHA1C",
+	"SHA1H",
+	"SHA1M",
+	"SHA1P",
+	"SHA1SU0",
+	"SHA1SU1",
+	"SHA256H",
+	"SHA256H2",
+	"SHA256SU0",
+	"SHA256SU1",
+	"LAST",
+}

src/cmd/internal/obj/arm64/anames7.go

+package arm64
+
+var cnames7 = []string{
+	"NONE",
+	"REG",
+	"RSP",
+	"FREG",
+	"VREG",
+	"PAIR",
+	"SHIFT",
+	"EXTREG",
+	"SPR",
+	"COND",
+	"ZCON",
+	"ADDCON0",
+	"ADDCON",
+	"MOVCON",
+	"BITCON",
+	"ABCON",
+	"MBCON",
+	"LCON",
+	"VCON",
+	"FCON",
+	"VCONADDR",
+	"AACON",
+	"LACON",
+	"AECON",
+	"SBRA",
+	"LBRA",
+	"NPAUTO",
+	"NSAUTO",
+	"PSAUTO",
+	"PPAUTO",
+	"UAUTO4K",
+	"UAUTO8K",
+	"UAUTO16K",
+	"UAUTO32K",
+	"UAUTO64K",
+	"LAUTO",
+	"SEXT1",
+	"SEXT2",
+	"SEXT4",
+	"SEXT8",
+	"SEXT16",
+	"LEXT",
+	"ZOREG",
+	"NPOREG",
+	"NSOREG",
+	"PSOREG",
+	"PPOREG",
+	"UOREG4K",
+	"UOREG8K",
+	"UOREG16K",
+	"UOREG32K",
+	"UOREG64K",
+	"LOREG",
+	"ADDR",
+	"ROFF",
+	"GOK",
+	"TEXTSIZE",
+	"NCLASS",
+}

src/cmd/internal/obj/arm64/list7.go

+// cmd/7l/list.c and cmd/7l/sub.c from Vita Nuova.
+// https://code.google.com/p/ken-cc/source/browse/
+//
+// 	Copyright © 1994-1999 Lucent Technologies Inc.  All rights reserved.
+// 	Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
+// 	Portions Copyright © 1997-1999 Vita Nuova Limited
+// 	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
+// 	Portions Copyright © 2004,2006 Bruce Ellis
+// 	Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
+// 	Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
+// 	Portions Copyright © 2009 The Go Authors.  All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+
+package arm64
+
+import (
+	"cmd/internal/obj"
+	"fmt"
+)
+
+var strcond = [16]string{
+	"EQ",
+	"NE",
+	"HS",
+	"LO",
+	"MI",
+	"PL",
+	"VS",
+	"VC",
+	"HI",
+	"LS",
+	"GE",
+	"LT",
+	"GT",
+	"LE",
+	"AL",
+	"NV",
+}
+
+func init() {
+	obj.RegisterRegister(obj.RBaseARM64, REG_SPECIAL+1024, Rconv)
+	obj.RegisterOpcode(obj.ABaseARM64, Anames)
+}
+
+func Rconv(r int) string {
+	if r == REGG {
+		return "g"
+	}
+	switch {
+	case REG_R0 <= r && r <= REG_R30:
+		return fmt.Sprintf("R%d", r-REG_R0)
+	case r == REG_R31:
+		return "ZR"
+	case REG_F0 <= r && r <= REG_F31:
+		return fmt.Sprintf("F%d", r-REG_F0)
+	case REG_V0 <= r && r <= REG_V31:
+		return fmt.Sprintf("V%d", r-REG_F0)
+	case COND_EQ <= r && r <= COND_NV:
+		return strcond[r-COND_EQ]
+	case r == REGSP:
+		return "RSP"
+	case r == REG_DAIF:
+		return "DAIF"
+	case r == REG_NZCV:
+		return "NZCV"
+	case r == REG_FPSR:
+		return "FPSR"
+	case r == REG_FPCR:
+		return "FPCR"
+	case r == REG_SPSR_EL1:
+		return "SPSR_EL1"
+	case r == REG_ELR_EL1:
+		return "ELR_EL1"
+	case r == REG_SPSR_EL2:
+		return "SPSR_EL2"
+	case r == REG_ELR_EL2:
+		return "ELR_EL2"
+	case r == REG_CurrentEL:
+		return "CurrentEL"
+	case r == REG_SP_EL0:
+		return "SP_EL0"
+	case r == REG_SPSel:
+		return "SPSel"
+	case r == REG_DAIFSet:
+		return "DAIFSet"
+	case r == REG_DAIFClr:
+		return "DAIFClr"
+	}
+	return fmt.Sprintf("badreg(%d)", r)
+}
+
+func DRconv(a int) string {
+	if a >= C_NONE && a <= C_NCLASS {
+		return cnames7[a]
+	}
+	return "C_??"
+}

src/cmd/internal/obj/arm64/util.go

+// Copyright 2015 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package arm64
+
+func bool2int(b bool) int {
+	if b {
+		return 1
+	}
+	return 0
+}

src/cmd/internal/obj/link.go

@@ -66,6 +66,7 @@ type Prog struct {
 	Reg      int16
 	From3    Addr
 	To       Addr
+	To2      Addr
 	Opt      interface{}
 	Forwd    *Prog
 	Pcond    *Prog
@@ -505,6 +506,7 @@ const (
 	R_SIZE
 	R_CALL
 	R_CALLARM
+	R_CALLARM64
 	R_CALLIND
 	R_CALLPOWER
 	R_CONST

src/cmd/internal/obj/util.go

@@ -332,6 +332,9 @@ func (p *Prog) String() string {
 	if p.To.Type != TYPE_NONE {
 		fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.To))
 	}
+	if p.To2.Type != TYPE_NONE {
+		fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.To2))
+	}
 	return buf.String()
 }
 
@@ -523,10 +526,8 @@ const (
 	RBase386   = 1 * 1024
 	RBaseAMD64 = 2 * 1024
 	RBaseARM   = 3 * 1024
-	RBasePPC64 = 4 * 1024
-	// The next free base is 8*1024 (PPC64 has many registers).
-	// Alternatively, the next architecture, with an ordinary
-	// number of registers, could go under PPC64.
+	RBasePPC64 = 4 * 1024 // range [4k, 8k)
+	RBaseARM64 = 8 * 1024 // range [8k, 12k)
 )
 
 // RegisterRegister binds a pretty-printer (Rconv) for register
@@ -585,6 +586,7 @@ const (
 	ABaseARM
 	ABaseAMD64
 	ABasePPC64
+	ABaseARM64
 	AMask = 1<<12 - 1 // AND with this to use the opcode as an array index.
 )