Commit 41f9f6f4 authored by Keith Randall's avatar Keith Randall

cmd/compile: fix load-combining

Make sure symbol gets carried along by load-combining rule.
Add the new load into the right block where we know that
mem is live.

Use auxInt field to carry i along instead of an explicit ADDQ.

Incorporate LEA ops into MOVBQZX and friends.

Change-Id: I587f7c6120b98fd2a0d48ddd6ddd13345d4421b4
Reviewed-on: https://go-review.googlesource.com/20732
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: 's avatarTodd Neal <todd@tneal.org>
parent ad4410d4
......@@ -35,15 +35,42 @@ func parseLE16(b []byte) uint16 {
func testLoadCombine() {
testData := []byte{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09}
if want, got := uint64(0x0908070605040302), parseLE64(testData); want != got {
println("testLargeConst add failed, wanted", want, "got", got)
println("testLoadCombine failed, wanted", want, "got", got)
failed = true
}
if want, got := uint32(0x05040302), parseLE32(testData); want != got {
println("testLargeConst add failed, wanted", want, "got", got)
println("testLoadCombine failed, wanted", want, "got", got)
failed = true
}
if want, got := uint16(0x0302), parseLE16(testData); want != got {
println("testLargeConst add failed, wanted", want, "got", got)
println("testLoadCombine failed, wanted", want, "got", got)
failed = true
}
}
var loadSymData = [...]byte{0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}
func testLoadSymCombine() {
w2 := uint16(0x0201)
g2 := uint16(loadSymData[0]) | uint16(loadSymData[1])<<8
if g2 != w2 {
println("testLoadSymCombine failed, wanted", w2, "got", g2)
failed = true
}
w4 := uint32(0x04030201)
g4 := uint32(loadSymData[0]) | uint32(loadSymData[1])<<8 |
uint32(loadSymData[2])<<16 | uint32(loadSymData[3])<<24
if g4 != w4 {
println("testLoadSymCombine failed, wanted", w4, "got", g4)
failed = true
}
w8 := uint64(0x0807060504030201)
g8 := uint64(loadSymData[0]) | uint64(loadSymData[1])<<8 |
uint64(loadSymData[2])<<16 | uint64(loadSymData[3])<<24 |
uint64(loadSymData[4])<<32 | uint64(loadSymData[5])<<40 |
uint64(loadSymData[6])<<48 | uint64(loadSymData[7])<<56
if g8 != w8 {
println("testLoadSymCombine failed, wanted", w8, "got", g8)
failed = true
}
}
......@@ -466,6 +493,7 @@ func main() {
testArithRshConst()
testLargeConst()
testLoadCombine()
testLoadSymCombine()
if failed {
panic("failed")
......
......@@ -689,6 +689,20 @@
(MOVOload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVOload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVBQZXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVBQZXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVWQZXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVWQZXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVLQZXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVLQZXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVBQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVBQSXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVWQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVWQSXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVLQSXload [off1] {sym1} (LEAQ [off2] {sym2} base) mem) && canMergeSym(sym1, sym2) ->
(MOVLQSXload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
(MOVQstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem) && canMergeSym(sym1, sym2) ->
(MOVQstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
(MOVLstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem) && canMergeSym(sym1, sym2) ->
......@@ -1168,13 +1182,13 @@
// There are many ways these combinations could occur. This is
// designed to match the way encoding/binary.LittleEndian does it.
(ORW (MOVBQZXload [i] {s} p mem)
(SHLWconst [8] (MOVBQZXload [i+1] {s} p mem))) -> (MOVWload (ADDQconst [i] p) mem)
(SHLWconst [8] (MOVBQZXload [i+1] {s} p mem))) -> @v.Args[0].Block (MOVWload [i] {s} p mem)
(ORL (ORL (ORL
(MOVBQZXload [i] {s} p mem)
(SHLLconst [8] (MOVBQZXload [i+1] {s} p mem)))
(SHLLconst [16] (MOVBQZXload [i+2] {s} p mem)))
(SHLLconst [24] (MOVBQZXload [i+3] {s} p mem))) -> (MOVLload (ADDQconst [i] p) mem)
(SHLLconst [24] (MOVBQZXload [i+3] {s} p mem))) -> @v.Args[0].Args[0].Args[0].Block (MOVLload [i] {s} p mem)
(ORQ (ORQ (ORQ (ORQ (ORQ (ORQ (ORQ
(MOVBQZXload [i] {s} p mem)
......@@ -1184,4 +1198,4 @@
(SHLQconst [32] (MOVBQZXload [i+4] {s} p mem)))
(SHLQconst [40] (MOVBQZXload [i+5] {s} p mem)))
(SHLQconst [48] (MOVBQZXload [i+6] {s} p mem)))
(SHLQconst [56] (MOVBQZXload [i+7] {s} p mem))) -> (MOVQload (ADDQconst [i] p) mem)
(SHLQconst [56] (MOVBQZXload [i+7] {s} p mem))) -> @v.Args[0].Args[0].Args[0].Args[0].Args[0].Args[0].Args[0].Block (MOVQload [i] {s} p mem)
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