cmd/compile: make LR allocatable in non-leaf functions on MIPS64

The mechanism is initially introduced (and reviewed) in CL 30597
on S390X.

Change-Id: I83024d2fc84c8efc23fbda52b3ad83073f42cb93
Reviewed-on: https://go-review.googlesource.com/32179Reviewed-by: David Chase <drchase@google.com>

src/cmd/compile/internal/ssa/gen/MIPS64Ops.go

@@ -60,9 +60,9 @@ var regNamesMIPS64 = []string{
 	// R26 reserved by kernel
 	// R27 reserved by kernel
 	// R28 = REGSB not used in regalloc
-	"SP", // aka R29
-	"g",  // aka R30
-	// R31 = REGLINK not used in regalloc
+	"SP",  // aka R29
+	"g",   // aka R30
+	"R31", // aka REGLINK
 
 	"F0",
 	"F1",
@@ -127,7 +127,7 @@ func init() {
 
 	// Common individual register masks
 	var (
-		gp         = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25")
+		gp         = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R31")
 		gpg        = gp | buildReg("g")
 		gpsp       = gp | buildReg("SP")
 		gpspg      = gpg | buildReg("SP")
@@ -282,7 +282,7 @@ func init() {
 			argLength: 2,
 			reg: regInfo{
 				inputs:   []regMask{gp},
-				clobbers: buildReg("R1"),
+				clobbers: buildReg("R1 R31"),
 			},
 			faultOnNilArg0: true,
 		},
@@ -376,6 +376,6 @@ func init() {
 		fpregmask:       fp,
 		specialregmask:  hi | lo,
 		framepointerreg: -1, // not used
-		linkreg:         -1, // not used
+		linkreg:         int8(num["R31"]),
 	})
 }