Commit 61a3ebed authored by Aram Hăvărneanu's avatar Aram Hăvărneanu

cmd/asm/internal/asm: add aliases for ARM64 condition codes

Add CS as an alias for HS, and CC as an alias for LO, otherwise

	CSINV	CS, R1, R2, R3

was interpreted as

	CSINV	0, R1, R2, R3

Also fix the corresponding faulty test.

Fixes #12632
Updates #12470

Change-Id: I974cfc7e5ced682d4754ba09b0b102cb08a46567
Reviewed-on: https://go-review.googlesource.com/14680Reviewed-by: 's avatarRob Pike <r@golang.org>
parent e7e27398
......@@ -252,7 +252,9 @@ func archArm64() *Arch {
register["EQ"] = arm64.COND_EQ
register["NE"] = arm64.COND_NE
register["HS"] = arm64.COND_HS
register["CS"] = arm64.COND_HS
register["LO"] = arm64.COND_LO
register["CC"] = arm64.COND_LO
register["MI"] = arm64.COND_MI
register["PL"] = arm64.COND_PL
register["VS"] = arm64.COND_VS
......
......@@ -37,7 +37,7 @@
147 00037 (testdata/arm64.s:147) CSEL LT, R1, R2, ZR
148 00038 (testdata/arm64.s:148) CSINC GT, R1, ZR, R3
149 00039 (testdata/arm64.s:149) CSNEG MI, R1, R2, R3
150 00040 (testdata/arm64.s:150) CSINV 0, R1, R2, R3
150 00040 (testdata/arm64.s:150) CSINV HS, R1, R2, R3
156 00041 (testdata/arm64.s:156) CSEL LT, R1, R2
164 00042 (testdata/arm64.s:164) CCMN MI, ZR, R1, $4
173 00043 (testdata/arm64.s:173) FADDD $(0.5), F1
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment