Commit 72636eb5 authored by Russ Cox's avatar Russ Cox

cmd/5g: fix temp-merging on ARM

mkvar was taking care of the "LeftAddr" case,
effectively hiding it from the temp-merging optimization.

Move it into prog.c.

R=ken2
CC=golang-dev
https://golang.org/cl/12884045
parent 071e44e4
......@@ -127,6 +127,11 @@ proginfo(ProgInfo *info, Prog *p)
if(info->flags == 0)
fatal("unknown instruction %P", p);
if(p->from.type == D_CONST && p->from.sym != nil && (info->flags & LeftRead)) {
info->flags &= ~LeftRead;
info->flags |= LeftAddr;
}
if((info->flags & RegRead) && p->reg == NREG) {
info->flags &= ~RegRead;
info->flags |= CanRegRead | RightRead;
......
......@@ -216,11 +216,12 @@ regopt(Prog *firstp)
if(p->as == ABL && p->to.type == D_EXTERN)
continue;
if(info.flags & LeftRead) {
bit = mkvar(r, &p->from);
bit = mkvar(r, &p->from);
if(info.flags & LeftRead)
for(z=0; z<BITS; z++)
r->use1.b[z] |= bit.b[z];
}
if(info.flags & LeftAddr)
setaddrs(bit);
if(info.flags & RegRead) {
if(p->from.type != D_FREG)
......@@ -697,9 +698,6 @@ mkvar(Reg *r, Adr *a)
case D_BRANCH:
break;
case D_CONST:
flag = 1;
goto onereg;
case D_REGREG:
case D_REGREG2:
......@@ -710,9 +708,9 @@ mkvar(Reg *r, Adr *a)
bit.b[0] |= RtoB(a->reg);
return bit;
case D_CONST:
case D_REG:
case D_SHIFT:
onereg:
if(a->reg != NREG) {
bit = zbits;
bit.b[0] = RtoB(a->reg);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment