Commit 75798e8a authored by Martin Möhrmann's avatar Martin Möhrmann Committed by Martin Möhrmann

runtime: make processor capability variable naming platform specific

The current support_XXX variables are specific for the
amd64 and 386 platforms.

Prefix processor capability variables by architecture to have a
consistent naming scheme and avoid reuse of the existing
variables for new platforms.

This also aligns naming of runtime variables closer with internal/cpu
processor capability variable names.

Change-Id: I3eabb29a03874678851376185d3a62e73c1aff1d
Reviewed-on: https://go-review.googlesource.com/c/91435
Run-TryBot: Martin Möhrmann <martisch@uos.de>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: 's avatarKeith Randall <khr@golang.org>
parent 529ea7c0
...@@ -144,8 +144,9 @@ var runtimeDecls = [...]struct { ...@@ -144,8 +144,9 @@ var runtimeDecls = [...]struct {
{"racewriterange", funcTag, 113}, {"racewriterange", funcTag, 113},
{"msanread", funcTag, 113}, {"msanread", funcTag, 113},
{"msanwrite", funcTag, 113}, {"msanwrite", funcTag, 113},
{"support_popcnt", varTag, 11}, {"x86HasPOPCNT", varTag, 11},
{"support_sse41", varTag, 11}, {"x86HasSSE41", varTag, 11},
{"arm64HasATOMICS", varTag, 11},
} }
func runtimeTypes() []*types.Type { func runtimeTypes() []*types.Type {
......
...@@ -195,5 +195,6 @@ func msanread(addr, size uintptr) ...@@ -195,5 +195,6 @@ func msanread(addr, size uintptr)
func msanwrite(addr, size uintptr) func msanwrite(addr, size uintptr)
// architecture variants // architecture variants
var support_popcnt bool var x86HasPOPCNT bool
var support_sse41 bool var x86HasSSE41 bool
var arm64HasATOMICS bool
...@@ -305,9 +305,9 @@ var ( ...@@ -305,9 +305,9 @@ var (
racereadrange, racereadrange,
racewrite, racewrite,
racewriterange, racewriterange,
supportPopcnt, x86HasPOPCNT,
supportSSE41, x86HasSSE41,
arm64SupportAtomics, arm64HasATOMICS,
typedmemclr, typedmemclr,
typedmemmove, typedmemmove,
Udiv, Udiv,
......
...@@ -86,9 +86,9 @@ func initssaconfig() { ...@@ -86,9 +86,9 @@ func initssaconfig() {
racereadrange = sysfunc("racereadrange") racereadrange = sysfunc("racereadrange")
racewrite = sysfunc("racewrite") racewrite = sysfunc("racewrite")
racewriterange = sysfunc("racewriterange") racewriterange = sysfunc("racewriterange")
supportPopcnt = sysvar("support_popcnt") // bool x86HasPOPCNT = sysvar("x86HasPOPCNT") // bool
supportSSE41 = sysvar("support_sse41") // bool x86HasSSE41 = sysvar("x86HasSSE41") // bool
arm64SupportAtomics = sysvar("arm64_support_atomics") // bool arm64HasATOMICS = sysvar("arm64HasATOMICS") // bool
typedmemclr = sysfunc("typedmemclr") typedmemclr = sysfunc("typedmemclr")
typedmemmove = sysfunc("typedmemmove") typedmemmove = sysfunc("typedmemmove")
Udiv = sysvar("udiv") // asm func with special ABI Udiv = sysvar("udiv") // asm func with special ABI
...@@ -3068,7 +3068,7 @@ func init() { ...@@ -3068,7 +3068,7 @@ func init() {
makeXaddARM64 := func(op0 ssa.Op, op1 ssa.Op, ty types.EType) func(s *state, n *Node, args []*ssa.Value) *ssa.Value { makeXaddARM64 := func(op0 ssa.Op, op1 ssa.Op, ty types.EType) func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
return func(s *state, n *Node, args []*ssa.Value) *ssa.Value { return func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
// Target Atomic feature is identified by dynamic detection // Target Atomic feature is identified by dynamic detection
addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), arm64SupportAtomics, s.sb) addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), arm64HasATOMICS, s.sb)
v := s.load(types.Types[TBOOL], addr) v := s.load(types.Types[TBOOL], addr)
b := s.endBlock() b := s.endBlock()
b.Kind = ssa.BlockIf b.Kind = ssa.BlockIf
...@@ -3208,7 +3208,7 @@ func init() { ...@@ -3208,7 +3208,7 @@ func init() {
makeRoundAMD64 := func(op ssa.Op) func(s *state, n *Node, args []*ssa.Value) *ssa.Value { makeRoundAMD64 := func(op ssa.Op) func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
return func(s *state, n *Node, args []*ssa.Value) *ssa.Value { return func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), supportSSE41, s.sb) addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), x86HasSSE41, s.sb)
v := s.load(types.Types[TBOOL], addr) v := s.load(types.Types[TBOOL], addr)
b := s.endBlock() b := s.endBlock()
b.Kind = ssa.BlockIf b.Kind = ssa.BlockIf
...@@ -3416,7 +3416,7 @@ func init() { ...@@ -3416,7 +3416,7 @@ func init() {
makeOnesCountAMD64 := func(op64 ssa.Op, op32 ssa.Op) func(s *state, n *Node, args []*ssa.Value) *ssa.Value { makeOnesCountAMD64 := func(op64 ssa.Op, op32 ssa.Op) func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
return func(s *state, n *Node, args []*ssa.Value) *ssa.Value { return func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), supportPopcnt, s.sb) addr := s.entryNewValue1A(ssa.OpAddr, types.Types[TBOOL].PtrTo(), x86HasPOPCNT, s.sb)
v := s.load(types.Types[TBOOL], addr) v := s.load(types.Types[TBOOL], addr)
b := s.endBlock() b := s.endBlock()
b.Kind = ssa.BlockIf b.Kind = ssa.BlockIf
......
...@@ -467,14 +467,14 @@ func init() { ...@@ -467,14 +467,14 @@ func init() {
{name: "BSWAPL", argLength: 1, reg: gp11, asm: "BSWAPL", resultInArg0: true, clobberFlags: true}, // arg0 swap bytes {name: "BSWAPL", argLength: 1, reg: gp11, asm: "BSWAPL", resultInArg0: true, clobberFlags: true}, // arg0 swap bytes
// POPCNT instructions aren't guaranteed to be on the target platform (they are SSE4). // POPCNT instructions aren't guaranteed to be on the target platform (they are SSE4).
// Any use must be preceded by a successful check of runtime.support_popcnt. // Any use must be preceded by a successful check of runtime.x86HasPOPCNT.
{name: "POPCNTQ", argLength: 1, reg: gp11, asm: "POPCNTQ", clobberFlags: true}, // count number of set bits in arg0 {name: "POPCNTQ", argLength: 1, reg: gp11, asm: "POPCNTQ", clobberFlags: true}, // count number of set bits in arg0
{name: "POPCNTL", argLength: 1, reg: gp11, asm: "POPCNTL", clobberFlags: true}, // count number of set bits in arg0 {name: "POPCNTL", argLength: 1, reg: gp11, asm: "POPCNTL", clobberFlags: true}, // count number of set bits in arg0
{name: "SQRTSD", argLength: 1, reg: fp11, asm: "SQRTSD"}, // sqrt(arg0) {name: "SQRTSD", argLength: 1, reg: fp11, asm: "SQRTSD"}, // sqrt(arg0)
// ROUNDSD instruction isn't guaranteed to be on the target platform (it is SSE4.1) // ROUNDSD instruction isn't guaranteed to be on the target platform (it is SSE4.1)
// Any use must be preceded by a successful check of runtime.support_sse41. // Any use must be preceded by a successful check of runtime.x86HasSSE41.
{name: "ROUNDSD", argLength: 1, reg: fp11, aux: "Int8", asm: "ROUNDSD"}, // rounds arg0 depending on auxint, 1 means math.Floor, 2 Ceil, 3 Trunc {name: "ROUNDSD", argLength: 1, reg: fp11, aux: "Int8", asm: "ROUNDSD"}, // rounds arg0 depending on auxint, 1 means math.Floor, 2 Ceil, 3 Trunc
{name: "SBBQcarrymask", argLength: 1, reg: flagsgp, asm: "SBBQ"}, // (int64)(-1) if carry is set, 0 if carry is clear. {name: "SBBQcarrymask", argLength: 1, reg: flagsgp, asm: "SBBQ"}, // (int64)(-1) if carry is set, 0 if carry is clear.
......
...@@ -17,3 +17,12 @@ const ( ...@@ -17,3 +17,12 @@ const (
offsetARMHasIDIVA = unsafe.Offsetof(cpu.ARM.HasIDIVA) offsetARMHasIDIVA = unsafe.Offsetof(cpu.ARM.HasIDIVA)
) )
var (
// Set in runtime.cpuinit.
// TODO: deprecate these; use internal/cpu directly.
x86HasPOPCNT bool
x86HasSSE41 bool
arm64HasATOMICS bool
)
...@@ -509,10 +509,10 @@ func cpuinit() { ...@@ -509,10 +509,10 @@ func cpuinit() {
// Support cpu feature variables are used in code generated by the compiler // Support cpu feature variables are used in code generated by the compiler
// to guard execution of instructions that can not be assumed to be always supported. // to guard execution of instructions that can not be assumed to be always supported.
support_popcnt = cpu.X86.HasPOPCNT x86HasPOPCNT = cpu.X86.HasPOPCNT
support_sse41 = cpu.X86.HasSSE41 x86HasSSE41 = cpu.X86.HasSSE41
arm64_support_atomics = cpu.ARM64.HasATOMICS arm64HasATOMICS = cpu.ARM64.HasATOMICS
} }
// The bootstrap sequence is: // The bootstrap sequence is:
......
...@@ -858,12 +858,6 @@ var ( ...@@ -858,12 +858,6 @@ var (
isIntel bool isIntel bool
lfenceBeforeRdtsc bool lfenceBeforeRdtsc bool
// Set in runtime.cpuinit.
// TODO: deprecate these; use internal/cpu directly.
support_popcnt bool
support_sse41 bool
arm64_support_atomics bool
goarm uint8 // set by cmd/link on arm systems goarm uint8 // set by cmd/link on arm systems
framepointer_enabled bool // set by cmd/link framepointer_enabled bool // set by cmd/link
) )
......
...@@ -101,7 +101,7 @@ func Len8(n uint8) int { ...@@ -101,7 +101,7 @@ func Len8(n uint8) int {
// -------------------- // // -------------------- //
func OnesCount(n uint) int { func OnesCount(n uint) int {
// amd64:"POPCNTQ",".*support_popcnt" // amd64:"POPCNTQ",".*x86HasPOPCNT"
// arm64:"VCNT","VUADDLV" // arm64:"VCNT","VUADDLV"
// s390x:"POPCNT" // s390x:"POPCNT"
// ppc64:"POPCNTD" // ppc64:"POPCNTD"
...@@ -110,7 +110,7 @@ func OnesCount(n uint) int { ...@@ -110,7 +110,7 @@ func OnesCount(n uint) int {
} }
func OnesCount64(n uint64) int { func OnesCount64(n uint64) int {
// amd64:"POPCNTQ",".*support_popcnt" // amd64:"POPCNTQ",".*x86HasPOPCNT"
// arm64:"VCNT","VUADDLV" // arm64:"VCNT","VUADDLV"
// s390x:"POPCNT" // s390x:"POPCNT"
// ppc64:"POPCNTD" // ppc64:"POPCNTD"
...@@ -119,7 +119,7 @@ func OnesCount64(n uint64) int { ...@@ -119,7 +119,7 @@ func OnesCount64(n uint64) int {
} }
func OnesCount32(n uint32) int { func OnesCount32(n uint32) int {
// amd64:"POPCNTL",".*support_popcnt" // amd64:"POPCNTL",".*x86HasPOPCNT"
// arm64:"VCNT","VUADDLV" // arm64:"VCNT","VUADDLV"
// s390x:"POPCNT" // s390x:"POPCNT"
// ppc64:"POPCNTW" // ppc64:"POPCNTW"
...@@ -128,7 +128,7 @@ func OnesCount32(n uint32) int { ...@@ -128,7 +128,7 @@ func OnesCount32(n uint32) int {
} }
func OnesCount16(n uint16) int { func OnesCount16(n uint16) int {
// amd64:"POPCNTL",".*support_popcnt" // amd64:"POPCNTL",".*x86HasPOPCNT"
// arm64:"VCNT","VUADDLV" // arm64:"VCNT","VUADDLV"
// s390x:"POPCNT" // s390x:"POPCNT"
// ppc64:"POPCNTW" // ppc64:"POPCNTW"
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment