Commit 783bcba8 authored by Shenghou Ma's avatar Shenghou Ma

cmd/5c, cmd/5g, cmd/5l, liblink: nacl/arm support

LGTM=dave, rsc
R=rsc, iant, dave
CC=golang-codereviews
https://golang.org/cl/108360043
parent 6fbade1e
......@@ -853,11 +853,15 @@ xtramodes(Reg *r, Addr *a)
switch (p1->from.type) {
case D_REG:
/* register offset */
if(nacl)
return 0;
a->type = D_SHIFT;
a->offset = p1->from.reg;
break;
case D_SHIFT:
/* scaled register offset */
if(nacl)
return 0;
a->type = D_SHIFT;
case D_CONST:
/* immediate offset */
......
......@@ -204,6 +204,16 @@ regopt(Prog *p)
break;
}
/* the mod/div runtime routines smash R12 */
switch(p->as) {
case AMOD:
case AMODU:
case ADIV:
case ADIVU:
regbits |= RtoB(12);
break;
}
if(p->as == AMOVM) {
if(p->from.type == D_CONST)
z = p->from.offset;
......
......@@ -60,7 +60,7 @@ swit2(C1 *q, int nc, int32 def, Node *n)
if(nc >= 3) {
i = (q+nc-1)->val - (q+0)->val;
if(i > 0 && i < nc*2)
if(!nacl && i > 0 && i < nc*2)
goto direct;
}
if(nc < 5) {
......
......@@ -1497,7 +1497,7 @@ sgen(Node *n, Node *res, int64 w)
if(osrc < odst && odst < osrc+w)
dir = -dir;
if(op == AMOVW && dir > 0 && c >= 4 && c <= 128) {
if(op == AMOVW && !nacl && dir > 0 && c >= 4 && c <= 128) {
r0.op = OREGISTER;
r0.val.u.reg = REGALLOC_R0;
r1.op = OREGISTER;
......
......@@ -76,7 +76,7 @@ zerorange(Prog *p, vlong frame, vlong lo, vlong hi, uint32 *r0)
if(cnt < 4*widthptr) {
for(i = 0; i < cnt; i += widthptr)
p = appendpp(p, AMOVW, D_REG, 0, 0, D_OREG, REGSP, 4+frame+lo+i);
} else if(cnt <= 128*widthptr) {
} else if(!nacl && (cnt <= 128*widthptr)) {
p = appendpp(p, AADD, D_CONST, NREG, 4+frame+lo, D_REG, 1, 0);
p->reg = REGSP;
p = appendpp(p, ADUFFZERO, D_NONE, NREG, 0, D_OREG, NREG, 0);
......@@ -906,7 +906,7 @@ clearfat(Node *nl)
patch(gbranch(ABNE, T, 0), pl);
regfree(&end);
} else if(q >= 4) {
} else if(q >= 4 && !nacl) {
f = sysfunc("duffzero");
p = gins(ADUFFZERO, N, f);
afunclit(&p->to, f);
......
......@@ -877,11 +877,15 @@ xtramodes(Graph *g, Flow *r, Adr *a)
switch (p1->from.type) {
case D_REG:
/* register offset */
if(nacl)
return 0;
a->type = D_SHIFT;
a->offset = p1->from.reg;
break;
case D_SHIFT:
/* scaled register offset */
if(nacl)
return 0;
a->type = D_SHIFT;
case D_CONST:
/* immediate offset */
......
......@@ -227,6 +227,10 @@ regopt(Prog *firstp)
for(z=0; z<BITS; z++)
r->set.b[z] |= bit.b[z];
}
/* the mod/div runtime routines smash R12 */
if(p->as == ADIV || p->as == ADIVU || p->as == AMOD || p->as == AMODU)
r->set.b[z] |= RtoB(12);
}
if(firstr == R)
return;
......
......@@ -211,6 +211,8 @@ enum
AVARKILL,
ADUFFCOPY,
ADUFFZERO,
ADATABUNDLE,
ADATABUNDLEEND,
AMRC, // MRC/MCR
......
......@@ -661,6 +661,7 @@ asmb(void)
case Hfreebsd:
case Hnetbsd:
case Hopenbsd:
case Hnacl:
asmbelf(symo);
break;
}
......
......@@ -63,6 +63,7 @@ archinit(void)
break;
case Hlinux:
case Hfreebsd:
case Hnacl:
break;
}
......@@ -82,7 +83,6 @@ archinit(void)
case Hlinux: /* arm elf */
case Hfreebsd:
case Hnetbsd:
case Hnacl:
debug['d'] = 0; // with dynamic linking
elfinit();
HEADR = ELFRESERVE;
......@@ -93,6 +93,17 @@ archinit(void)
if(INITRND == -1)
INITRND = 4096;
break;
case Hnacl:
elfinit();
HEADR = 0x10000;
funcalign = 16;
if(INITTEXT == -1)
INITTEXT = 0x20000;
if(INITDAT == -1)
INITDAT = 0;
if(INITRND == -1)
INITRND = 0x10000;
break;
}
if(INITDAT != 0 && INITRND != 0)
print("warning: -D0x%ux is ignored because of -R0x%ux\n",
......
This diff is collapsed.
......@@ -154,6 +154,9 @@ linknew(LinkArch *arch)
case '8':
ctxt->tlsoffset = -8;
break;
case '5':
ctxt->tlsoffset = 0;
break;
}
break;
......
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