Commit 7b9c2c19 authored by Martin Möhrmann's avatar Martin Möhrmann

internal/cpu: add and use cpu.CacheLinePad for padding structs

Add a CacheLinePad struct type to internal/cpu that has a size of CacheLineSize.
This can be used for padding structs in order to avoid false sharing.

Updates #25203

Change-Id: Icb95ae68d3c711f5f8217140811cad1a1d5be79a
Reviewed-on: https://go-review.googlesource.com/116276
Run-TryBot: Martin Möhrmann <moehrmann@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: 's avatarBrad Fitzpatrick <bradfitz@golang.org>
parent 84feb4bb
...@@ -10,6 +10,9 @@ package cpu ...@@ -10,6 +10,9 @@ package cpu
// and GOOS is Linux or Darwin. This variable is linknamed in runtime/proc.go. // and GOOS is Linux or Darwin. This variable is linknamed in runtime/proc.go.
var debugOptions bool var debugOptions bool
// CacheLinePad is used to pad structs to avoid false sharing.
type CacheLinePad struct{ _ [CacheLineSize]byte }
var X86 x86 var X86 x86
// The booleans in x86 contain the correspondingly named cpuid feature bit. // The booleans in x86 contain the correspondingly named cpuid feature bit.
...@@ -17,7 +20,7 @@ var X86 x86 ...@@ -17,7 +20,7 @@ var X86 x86
// in addition to the cpuid feature bit being set. // in addition to the cpuid feature bit being set.
// The struct is padded to avoid false sharing. // The struct is padded to avoid false sharing.
type x86 struct { type x86 struct {
_ [CacheLineSize]byte _ CacheLinePad
HasAES bool HasAES bool
HasADX bool HasADX bool
HasAVX bool HasAVX bool
...@@ -34,7 +37,7 @@ type x86 struct { ...@@ -34,7 +37,7 @@ type x86 struct {
HasSSSE3 bool HasSSSE3 bool
HasSSE41 bool HasSSE41 bool
HasSSE42 bool HasSSE42 bool
_ [CacheLineSize]byte _ CacheLinePad
} }
var PPC64 ppc64 var PPC64 ppc64
...@@ -47,7 +50,7 @@ var PPC64 ppc64 ...@@ -47,7 +50,7 @@ var PPC64 ppc64
// safety. // safety.
// The struct is padded to avoid false sharing. // The struct is padded to avoid false sharing.
type ppc64 struct { type ppc64 struct {
_ [CacheLineSize]byte _ CacheLinePad
HasVMX bool // Vector unit (Altivec) HasVMX bool // Vector unit (Altivec)
HasDFP bool // Decimal Floating Point unit HasDFP bool // Decimal Floating Point unit
HasVSX bool // Vector-scalar unit HasVSX bool // Vector-scalar unit
...@@ -59,7 +62,7 @@ type ppc64 struct { ...@@ -59,7 +62,7 @@ type ppc64 struct {
HasSCV bool // Syscall vectored (requires kernel enablement) HasSCV bool // Syscall vectored (requires kernel enablement)
IsPOWER8 bool // ISA v2.07 (POWER8) IsPOWER8 bool // ISA v2.07 (POWER8)
IsPOWER9 bool // ISA v3.00 (POWER9) IsPOWER9 bool // ISA v3.00 (POWER9)
_ [CacheLineSize]byte _ CacheLinePad
} }
var ARM64 arm64 var ARM64 arm64
...@@ -67,7 +70,7 @@ var ARM64 arm64 ...@@ -67,7 +70,7 @@ var ARM64 arm64
// The booleans in arm64 contain the correspondingly named cpu feature bit. // The booleans in arm64 contain the correspondingly named cpu feature bit.
// The struct is padded to avoid false sharing. // The struct is padded to avoid false sharing.
type arm64 struct { type arm64 struct {
_ [CacheLineSize]byte _ CacheLinePad
HasFP bool HasFP bool
HasASIMD bool HasASIMD bool
HasEVTSTRM bool HasEVTSTRM bool
...@@ -92,13 +95,13 @@ type arm64 struct { ...@@ -92,13 +95,13 @@ type arm64 struct {
HasSHA512 bool HasSHA512 bool
HasSVE bool HasSVE bool
HasASIMDFHM bool HasASIMDFHM bool
_ [CacheLineSize]byte _ CacheLinePad
} }
var S390X s390x var S390X s390x
type s390x struct { type s390x struct {
_ [CacheLineSize]byte _ CacheLinePad
HasZArch bool // z architecture mode is active [mandatory] HasZArch bool // z architecture mode is active [mandatory]
HasSTFLE bool // store facility list extended [mandatory] HasSTFLE bool // store facility list extended [mandatory]
HasLDisp bool // long (20-bit) displacements [mandatory] HasLDisp bool // long (20-bit) displacements [mandatory]
...@@ -115,7 +118,7 @@ type s390x struct { ...@@ -115,7 +118,7 @@ type s390x struct {
HasSHA256 bool // K{I,L}MD-SHA-256 functions HasSHA256 bool // K{I,L}MD-SHA-256 functions
HasSHA512 bool // K{I,L}MD-SHA-512 functions HasSHA512 bool // K{I,L}MD-SHA-512 functions
HasVX bool // vector facility. Note: the runtime sets this when it processes auxv records. HasVX bool // vector facility. Note: the runtime sets this when it processes auxv records.
_ [CacheLineSize]byte _ CacheLinePad
} }
// initialize examines the processor and sets the relevant variables above. // initialize examines the processor and sets the relevant variables above.
......
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