cmd/compile: simplify shift lowering on s390x

Use conditional moves instead of subtractions with borrow to handle
saturation cases. This allows us to delete the SUBE/SUBEW ops and
associated rules from the SSA backend. Using conditional moves also
means we can detect when shift values are masked so I've added some
new rules to constant fold the relevant comparisons and masking ops.

Also use the new shiftIsBounded() function to avoid generating code
to handle saturation cases where possible.

Updates #25167 for s390x.

Change-Id: Ief9991c91267c9151ce4c5ec07642abb4dcc1c0d
Reviewed-on: https://go-review.googlesource.com/110070
Run-TryBot: Michael Munday <mike.munday@ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>

src/cmd/compile/internal/s390x/ssa.go

@@ -305,13 +305,6 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
 		}
 		p.To.Type = obj.TYPE_REG
 		p.To.Reg = r
-	case ssa.OpS390XSUBEcarrymask, ssa.OpS390XSUBEWcarrymask:
-		r := v.Reg()
-		p := s.Prog(v.Op.Asm())
-		p.From.Type = obj.TYPE_REG
-		p.From.Reg = r
-		p.To.Type = obj.TYPE_REG
-		p.To.Reg = r
 	case ssa.OpS390XMOVDaddridx:
 		r := v.Args[0].Reg()
 		i := v.Args[1].Reg()

src/cmd/compile/internal/ssa/gen/S390XOps.go

@@ -152,7 +152,6 @@ func init() {
 
 		gp2flags  = regInfo{inputs: []regMask{gpsp, gpsp}}
 		gp1flags  = regInfo{inputs: []regMask{gpsp}}
-		flagsgp   = regInfo{outputs: gponly}
 		gp2flags1 = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
 
 		gpload       = regInfo{inputs: []regMask{ptrspsb, 0}, outputs: gponly}
@@ -334,10 +333,6 @@ func init() {
 
 		{name: "FSQRT", argLength: 1, reg: fp11, asm: "FSQRT"}, // sqrt(arg0)
 
-		{name: "SUBEcarrymask", argLength: 1, reg: flagsgp, asm: "SUBE"},  // (int64)(-1) if carry is set, 0 if carry is clear.
-		{name: "SUBEWcarrymask", argLength: 1, reg: flagsgp, asm: "SUBE"}, // (int32)(-1) if carry is set, 0 if carry is clear.
-		// Note: 32-bits subtraction is not implemented in S390X. Temporarily use SUBE (64-bits).
-
 		{name: "MOVDEQ", argLength: 3, reg: gp2flags1, resultInArg0: true, asm: "MOVDEQ"}, // extract == condition from arg0
 		{name: "MOVDNE", argLength: 3, reg: gp2flags1, resultInArg0: true, asm: "MOVDNE"}, // extract != condition from arg0
 		{name: "MOVDLT", argLength: 3, reg: gp2flags1, resultInArg0: true, asm: "MOVDLT"}, // extract signed < condition from arg0

src/cmd/compile/internal/ssa/opGen.go

@@ -1760,8 +1760,6 @@ const (
 	OpS390XNOT
 	OpS390XNOTW
 	OpS390XFSQRT
-	OpS390XSUBEcarrymask
-	OpS390XSUBEWcarrymask
 	OpS390XMOVDEQ
 	OpS390XMOVDNE
 	OpS390XMOVDLT
@@ -23409,26 +23407,6 @@ var opcodeTable = [...]opInfo{
 			},
 		},
 	},
-	{
-		name:   "SUBEcarrymask",
-		argLen: 1,
-		asm:    s390x.ASUBE,
-		reg: regInfo{
-			outputs: []outputInfo{
-				{0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
-			},
-		},
-	},
-	{
-		name:   "SUBEWcarrymask",
-		argLen: 1,
-		asm:    s390x.ASUBE,
-		reg: regInfo{
-			outputs: []outputInfo{
-				{0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
-			},
-		},
-	},
 	{
 		name:         "MOVDEQ",
 		argLen:       3,

test/codegen/shift.go

+// asmcheck
+
+// Copyright 2018 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package codegen
+
+// ------------------ //
+//   masked shifts    //
+// ------------------ //
+
+func lshMask64x64(v int64, s uint64) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v << (s&63)
+}
+
+func rshMask64Ux64(v uint64, s uint64) uint64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func rshMask64x64(v int64, s uint64) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func lshMask32x64(v int32, s uint64) int32 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v << (s&63)
+}
+
+func rshMask32Ux64(v uint32, s uint64) uint32 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func rshMask32x64(v int32, s uint64) int32 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func lshMask64x32(v int64, s uint32) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v << (s&63)
+}
+
+func rshMask64Ux32(v uint64, s uint32) uint64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func rshMask64x32(v int64, s uint32) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> (s&63)
+}
+
+func lshMask64x32Ext(v int64, s int32) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v << uint(s&63)
+}
+
+func rshMask64Ux32Ext(v uint64, s int32) uint64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> uint(s&63)
+}
+
+func rshMask64x32Ext(v int64, s int32) int64 {
+	// s390x:-".*AND",-".*MOVDGE"
+	return v >> uint(s&63)
+}
+
+// ------------------ //
+//   bounded shifts   //
+// ------------------ //
+
+func lshGuarded64(v int64, s uint) int64 {
+	if s < 64 {
+		// s390x:-".*AND",-".*MOVDGE"
+		return v >> s
+	}
+	panic("shift too large")
+}
+
+func rshGuarded64U(v uint64, s uint) uint64 {
+	if s < 64 {
+		// s390x:-".*AND",-".*MOVDGE"
+		return v >> s
+	}
+	panic("shift too large")
+}
+
+func rshGuarded64(v int64, s uint) int64 {
+	if s < 64 {
+		// s390x:-".*AND",-".*MOVDGE"
+		return v << s
+	}
+	panic("shift too large")
+}