Commit d7f5c036 authored by fanzha02's avatar fanzha02 Committed by Cherry Zhang

cmd/internal/obj/arm64: reorder the assembler's optab entries

Current optab entries are unordered, because the new instructions
are added at the end of the optab. The patch reorders them by comments
in optab, such as arithmetic operations, logical operations and a
series of load/store etc.

The patch removes the VMOVS opcode because FMOVS already has the same
operation.

Change-Id: Iccdf89ecbb3875b9dfcb6e06be2cc19c7e5581a2
Reviewed-on: https://go-review.googlesource.com/109896
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: 's avatarCherry Zhang <cherryyz@google.com>
parent adb52cff
...@@ -226,12 +226,15 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8 ...@@ -226,12 +226,15 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
VST1.P V4.D[1], 8(R0) // 04849f4d VST1.P V4.D[1], 8(R0) // 04849f4d
VST1.P V4.D[1], (R0)(R1) // VST1.P V4.D[1], (R0)(R1*1) // 0484814d VST1.P V4.D[1], (R0)(R1) // VST1.P V4.D[1], (R0)(R1*1) // 0484814d
VST1 V4.D[1], (R0) // 0484004d VST1 V4.D[1], (R0) // 0484004d
VMOVS V20, (R0) // 140000bd FMOVS F20, (R0) // 140000bd
VMOVS.P V20, 4(R0) // 144400bc FMOVS.P F20, 4(R0) // 144400bc
VMOVS.W V20, 4(R0) // 144c00bc FMOVS.W F20, 4(R0) // 144c00bc
VMOVS (R0), V20 // 140040bd FMOVS (R0), F20 // 140040bd
VMOVS.P 8(R0), V20 // 148440bc FMOVS.P 8(R0), F20 // 148440bc
VMOVS.W 8(R0), V20 // 148c40bc FMOVS.W 8(R0), F20 // 148c40bc
FMOVD F20, (R2) // 540000fd
FMOVD.P F20, 8(R1) // 348400fc
FMOVD.W 8(R1), F20 // 348c40fc
PRFM (R2), PLDL1KEEP // 400080f9 PRFM (R2), PLDL1KEEP // 400080f9
PRFM 16(R2), PLDL1KEEP // 400880f9 PRFM 16(R2), PLDL1KEEP // 400880f9
PRFM 48(R6), PSTL2STRM // d31880f9 PRFM 48(R6), PSTL2STRM // d31880f9
......
...@@ -884,7 +884,6 @@ const ( ...@@ -884,7 +884,6 @@ const (
AVREV64 AVREV64
AVST1 AVST1
AVDUP AVDUP
AVMOVS
AVADDV AVADDV
AVMOVI AVMOVI
AVUADDLV AVUADDLV
......
...@@ -386,7 +386,6 @@ var Anames = []string{ ...@@ -386,7 +386,6 @@ var Anames = []string{
"VREV64", "VREV64",
"VST1", "VST1",
"VDUP", "VDUP",
"VMOVS",
"VADDV", "VADDV",
"VMOVI", "VMOVI",
"VUADDLV", "VUADDLV",
......
This diff is collapsed.
...@@ -97,6 +97,8 @@ such as str, stur, strb, sturb, strh, sturh stlr, stlrb. stlrh, st1. ...@@ -97,6 +97,8 @@ such as str, stur, strb, sturb, strh, sturh stlr, stlrb. stlrh, st1.
MADD R2, R30, R22, R6 <=> madd x6, x22, x2, x30 MADD R2, R30, R22, R6 <=> madd x6, x22, x2, x30
SMSUBL R10, R3, R17, R27 <=> smsubl x27, w17, w10, x3 SMSUBL R10, R3, R17, R27 <=> smsubl x27, w17, w10, x3
(3) FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS, FNMSUBD, FNMSUBS <Fm>, <Fa>, <Fn>, <Fd>
Examples: Examples:
FMADDD F30, F20, F3, F29 <=> fmadd d29, d3, d30, d20 FMADDD F30, F20, F3, F29 <=> fmadd d29, d3, d30, d20
FNMSUBS F7, F25, F7, F22 <=> fnmsub s22, s7, s7, s25 FNMSUBS F7, F25, F7, F22 <=> fnmsub s22, s7, s7, s25
......
...@@ -26,7 +26,7 @@ TEXT ·sha1block(SB),NOSPLIT,$0 ...@@ -26,7 +26,7 @@ TEXT ·sha1block(SB),NOSPLIT,$0
MOVD k_base+48(FP), R2 // k constants first address MOVD k_base+48(FP), R2 // k constants first address
MOVD p_len+32(FP), R3 // message length MOVD p_len+32(FP), R3 // message length
VLD1.P 16(R0), [V0.S4] VLD1.P 16(R0), [V0.S4]
VMOVS (R0), V20 FMOVS (R0), F20
SUB $16, R0, R0 SUB $16, R0, R0
blockloop: blockloop:
...@@ -148,5 +148,5 @@ blockloop: ...@@ -148,5 +148,5 @@ blockloop:
sha1ret: sha1ret:
VST1.P [V0.S4], 16(R0) // store hash value H(dcba) VST1.P [V0.S4], 16(R0) // store hash value H(dcba)
VMOVS V20, (R0) // store hash value H(e) FMOVS F20, (R0) // store hash value H(e)
RET RET
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment