internal/cpu: add a CacheLinePadSize constant

The new constant CacheLinePadSize can be used to compute best effort
alignment of structs to cache lines.

e.g. the runtime can use this in the locktab definition:
var locktab [57]struct {
        l   spinlock
        pad [cpu.CacheLinePadSize - unsafe.Sizeof(spinlock{})]byte
}

Change-Id: I86f6fbfc5ee7436f742776a7d4a99a1d54ffccc8
Reviewed-on: https://go-review.googlesource.com/131237Reviewed-by: Ian Lance Taylor <iant@golang.org>
Run-TryBot: Ian Lance Taylor <iant@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>

src/internal/cpu/cpu.go

@@ -12,7 +12,12 @@ package cpu
 var DebugOptions bool
 
 // CacheLinePad is used to pad structs to avoid false sharing.
-type CacheLinePad struct{ _ [CacheLineSize]byte }
+type CacheLinePad struct{ _ [CacheLinePadSize]byte }
+
+// CacheLineSize is the CPU's assumed cache line size.
+// There is currently no runtime detection of the real cache line size
+// so we use the constant per GOARCH CacheLinePadSize as an approximation.
+var CacheLineSize = CacheLinePadSize
 
 var X86 x86
 

src/internal/cpu/cpu_arm.go

@@ -4,7 +4,7 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLinePadSize = 32
 
 // arm doesn't have a 'cpuid' equivalent, so we rely on HWCAP/HWCAP2.
 // These are linknamed in runtime/os_(linux|freebsd)_arm.go and are

src/internal/cpu/cpu_arm64.go

@@ -4,7 +4,7 @@
 
 package cpu
 
-const CacheLineSize = 64
+const CacheLinePadSize = 64
 
 // arm64 doesn't have a 'cpuid' equivalent, so we rely on HWCAP/HWCAP2.
 // These are initialized by archauxv in runtime/os_linux_arm64.go.

src/internal/cpu/cpu_mips.go

@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLinePadSize = 32

src/internal/cpu/cpu_mips64.go

@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLinePadSize = 32

src/internal/cpu/cpu_mips64le.go

@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLinePadSize = 32

src/internal/cpu/cpu_mipsle.go

@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLinePadSize = 32

src/internal/cpu/cpu_ppc64x.go

@@ -6,7 +6,7 @@
 
 package cpu
 
-const CacheLineSize = 128
+const CacheLinePadSize = 128
 
 // ppc64x doesn't have a 'cpuid' equivalent, so we rely on HWCAP/HWCAP2.
 // These are initialized by archauxv in runtime/os_linux_ppc64x.go.

src/internal/cpu/cpu_s390x.go

@@ -4,7 +4,7 @@
 
 package cpu
 
-const CacheLineSize = 256
+const CacheLinePadSize = 256
 
 // bitIsSet reports whether the bit at index is set. The bit index
 // is in big endian order, so bit index 0 is the leftmost bit.

src/internal/cpu/cpu_wasm.go

@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 64
+const CacheLinePadSize = 64

src/internal/cpu/cpu_x86.go

@@ -6,7 +6,7 @@
 
 package cpu
 
-const CacheLineSize = 64
+const CacheLinePadSize = 64
 
 // cpuid is implemented in cpu_x86.s.
 func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)